Digital memories are widely used in computers, computer system components and computer processing systems. Resistive memories store digital information in the form of bits or binary digits as “0”s or “1”s based on the resistance of a memory element or cell.
Resistive memory devices are configured in arrays where a resistive element or cell is at the intersection of a row line (or “word” line) and a column line (“digit” line or “bit” line). In order to read or sense the state of a memory cell, it is necessary to first select the desired memory cell by selecting the column line and row line, which intersect at the desired memory element. Once the desired memory element is isolated, the selected memory cell is then read by applying a read voltage to the cell. The applied voltage causes current flow through the selected cell which is sensed to determine the logic state of the cell. Sensing circuits often use digital counters which count a clock signal to establish a count value which is related to the current flow through the cell. An example of such an arrangement is illustrated in commonly-assigned U.S. Pat. No. 6,504,750, issued Jan. 7, 2003, titled “RESISTIVE MEMORY ELEMENT SENSING USING AVERAGING” which is incorporated by reference in its entirety herein.
Current sensing circuits used to measure memory cell resistances use clocked comparators and counting circuits and have a tendency to saturate, providing a continuous string of ones or zeroes. Typically, each type of string is a result of an incompatible clock oscillator frequency for received voltages which are related to current flow through the cell.